How Computers Remember Data: Latches, Flip-Flops & RAM

1. Where Have We Reached So Far?

We established the computational chain: Transistors → Logic Gates → Adder → ALU. Now our ALU can compute sums and logic.

However, when a CPU is instructed to compute 5 + 3, it must resolve:

Where is the number 5 stored?
Where is the number 3 stored?
Where will the result be saved?
How does the next instruction access prior outcomes?

This necessitates: Memory.

2. What Actually Is Memory?

The essential purpose of computer memory is: Preserving information or state so the computer can retrieve and utilize it at a later time.

Standard Logic Gate:

As soon as input voltage is removed, the output is instantly lost.

Memory Circuit:

Even after input pulses disappear, the circuit remembers its previous state.

3. Combinational Logic vs. Sequential Logic

Combinational Logic

Output depends exclusively upon the present inputs at this exact instant.

Current Inputs → Logic → Output

Examples: AND, OR, XOR, Adders

Sequential Logic

Output depends on both current inputs AND the system's prior historical state.

Inputs + Prior State → Circuit → New State

Examples: Latches, Flip-Flops, Registers, RAM

4. Feedback Loops & The Latch

When an output signal from a logic gate is routed back into its own input (Feedback Loop), the circuit achieves bistable equilibrium—holding onto a state continuously:

Gate A ──→ Gate B ──→ Feedback to Gate A

This elementary memory circuit is called a Latch (e.g., an SR Latch: S = Set to store 1, R = Reset to clear to 0).

5. The Flip-Flop & The Clock Signal

When a latch is gated to synchronize state changes strictly to rhythmic clock pulses, it is called an edge-triggered Flip-Flop.

Periodic Clock Oscillator Pulse

_‾_‾_‾_‾_‾_‾_‾_

Clock Tick → Synchronized State Update → Next Clock Tick

1 Flip-Flop = 1 Stable Binary State = 1 Bit of Information Storage

6. What Are Registers and Why Does the CPU Rely on Them?

Placing 8, 32, or 64 flip-flops in parallel creates a Register.

Registers reside directly within the CPU core, functioning as ultra-fast scratchpad memory:

Register A (5) + Register B (3)

↓ ALU Calculation ↓

Destination Register (8)

7. The Memory Hierarchy

Memory systems balance access speed against cost and storage density:

Registers (Fastest, sub-nanosecond, a few bytes)

CPU Cache: L1, L2, L3 (Extremely fast, megabytes)

Main RAM (Working memory, gigabytes)

SSD / HDD (Permanent storage, terabytes, slower)

8. SRAM vs. DRAM

Characteristic	SRAM (Static RAM)	DRAM (Dynamic RAM)
Speed	Blisteringly fast	Moderately fast
Density & Cost	Low density (4-6 transistors/bit), expensive	High density (1 transistor + 1 capacitor), cost-effective
Typical Application	CPU Caches (L1, L2, L3)	Main System RAM Modules

9. The Stored-Program Concept

Memory does not solely house numbers or text variables—it also stores executable program Instructions (ADD, LOAD, STORE, JUMP).

Memory (Instructions + Data) ──→ CPU (Registers + ALU + Control Unit)

10. The Three Foundational Pillars of Computing

1. Logic

Logic Gates (AND, OR, NOT)

2. Computation

ALU (Adders, Arithmetic)

3. Storage

Registers, Cache, RAM

Only one final pillar remains: Control — orchestrating which operation happens when!

🧠 Key Takeaways

Sequential Logic utilizes feedback loops to retain historical state.
Latches and Flip-Flops constitute the primary electronic building blocks for storing 1 bit.
A Clock Signal synchronizes execution steps across digital circuitry.
Registers provide the CPU with immediate, zero-latency working storage.
SRAM Caches mitigate the latency gap between rapid CPU cores and slower DRAM.
The Stored-Program Architecture places instructions and data in unified memory.

🚀 Next Lesson

Lesson 08 — How the CPU Works: From Instruction to Execution

In the next lesson, we trace the full processor cycle:

Fetch Decode Execute PC IR Control Unit ALU

And see firsthand how a complete modern processor executes software instructions.

Lesson 07 — How Computers Remember Data: Latches, Flip-Flops & RAM